diff options
| author | Victor Mignot <victor@vmignot.fr> | 2026-02-02 20:18:48 +0100 |
|---|---|---|
| committer | Victor Mignot <victor@vmignot.fr> | 2026-02-03 21:02:18 +0100 |
| commit | f19ca61f48710fab019f39bb87bf6fb15f4ae7da (patch) | |
| tree | 24a8371b6a6f286ca80eb8ab9ef3524b97588463 /src/gpio.h | |
| parent | fb859c9c85688d1a144b732cf688746f2651be40 (diff) | |
| download | nanji-f19ca61f48710fab019f39bb87bf6fb15f4ae7da.tar.gz | |
nrf52832: add interface to control GPIO pins
Diffstat (limited to 'src/gpio.h')
| -rw-r--r-- | src/gpio.h | 120 |
1 files changed, 120 insertions, 0 deletions
diff --git a/src/gpio.h b/src/gpio.h new file mode 100644 index 0000000..28c0c20 --- /dev/null +++ b/src/gpio.h @@ -0,0 +1,120 @@ +#ifndef GPIO_H +#define GPIO_H + +#include "types.h" + +/** + * The signal level of a GPIO line. + */ +enum gpio_level { + LOW = 0, + HIGH = 1, +}; + +/** + * The availables GPIO pins on the NRF82832. + */ +enum gpio_pin { + PIN_0 = 0, + PIN_1 = 1, + PIN_2 = 2, + PIN_3 = 3, + PIN_4 = 4, + PIN_5 = 5, + PIN_6 = 6, + PIN_7 = 7, + PIN_8 = 8, + PIN_9 = 9, + PIN_10 = 10, + PIN_11 = 11, + PIN_12 = 12, + PIN_13 = 13, + PIN_14 = 14, + PIN_15 = 15, + PIN_16 = 16, + PIN_17 = 17, + PIN_18 = 18, + PIN_19 = 19, + PIN_20 = 20, + PIN_21 = 21, + PIN_22 = 22, + PIN_23 = 23, + PIN_24 = 24, + PIN_25 = 25, + PIN_26 = 26, + PIN_27 = 27, + PIN_28 = 28, + PIN_29 = 29, + PIN_30 = 30, + PIN_31 = 31, +}; + +/** + * The pull configuration for a GPIO line. + */ +enum gpio_pull_configuration { + /** Keep the GPIO in a floating state when the circuit is open */ + NO_PULL = 0, + + /** Force the signal to the `LOW` level when the circuit is open */ + PULL_DOWN = 1, + + /** Force the signal to the `HIGH` level when the circuit is open */ + PULL_UP = 3, +}; + +/** + * The drive configuration for a GPIO line. + */ +enum gpio_drive_configuration { + /** Standard 0, Standard 1 */ + S0S1 = 0, + + /** High drive 0, Standard 1 */ + H0S1 = 1, + + /** Standard 0, High drive 1 */ + S0H1 = 2, + + /** High drive 0, High Drive 1 */ + H0H1 = 3, + + /** Disconnect 0, Standard 1 */ + D0S1 = 4, + + /** Disconnect 0, High drive 1 */ + D0H1 = 5, + + /** Standard 0, Disconnect 1 */ + S0D1 = 6, + + /** High drive 0, Disconnect 1 */ + H0D1 = 7, +}; + +/** + * Init the given pin as an input. + */ +void gpio_input_pin_init(enum gpio_pin pin, enum gpio_pull_configuration pull_config, enum gpio_level sensibility); + +/** + * Init the given pin as output. + */ +void gpio_output_pin_init(enum gpio_pin pin, enum gpio_drive_configuration drive_config); + +/** + * Disable a GPIO pin. + */ +u8 gpio_pin_disable(enum gpio_pin pin); + +/** + * Read the current signal level of the given GPIO pin. + */ +enum gpio_level gpio_pin_get_level(enum gpio_pin pin); + +/** + * Set the given GPIO pin to the given level. + */ +void gpio_pin_set_level(enum gpio_pin pin, enum gpio_level level); + +#endif |
