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| author | Victor Mignot <victor@vmignot.fr> | 2025-07-22 15:14:14 +0200 |
|---|---|---|
| committer | Victor Mignot <victor@vmignot.fr> | 2025-07-23 15:08:17 +0200 |
| commit | f6a2143e22f577abafea5190b242471da6e34896 (patch) | |
| tree | f2465b65f11a8b9d83c467d4658ffd7257e8b0e9 /src/boot.s | |
| download | nanji-f6a2143e22f577abafea5190b242471da6e34896.tar.gz | |
cortex-m4f: bootstrap code
Diffstat (limited to 'src/boot.s')
| -rw-r--r-- | src/boot.s | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/boot.s b/src/boot.s new file mode 100644 index 0000000..626420c --- /dev/null +++ b/src/boot.s @@ -0,0 +1,67 @@ +.syntax unified +.thumb + +.section .vector_table, "a" +.word __stack_top /* Initial stack pointer */ +.word _start /* Reset Handler */ +.word _hang /* Non Maskable Interrupts */ +.word _hang /* Hard Fault */ +.word _hang /* Memory Management Fault */ +.word _hang /* Bus Fault */ +.word _hang /* Usage Fault */ +.skip 16 /* Reserved */ +.word _hang /* SVCall */ +.skip 8 /* Reserved */ +.word _hang /* PendSV */ +.word _hang /* SysTick */ + + +.text +.align +.thumb_func +_start: +/* Zero init BSS */ +_bss_init_start: + /* BSS section start and end addresses are 4-bytes aligned thanks to the linker script */ + ldr r0, =__bss_start + ldr r1, =__bss_end + mov r2, #0 +_bss_init_loop: + cmp r0, r1 + beq _bss_init_end + str r2, [r0], #4 + b _bss_init_loop +_bss_init_end: + +/* Init data section */ +_data_init_start: + /* Data section start and end addresses are also 4-bytes aligned */ + ldr r0, =__data_lma + ldr r1, =__data_start + ldr r2, =__data_end +__data_init_loop: + cmp r1, r2 + beq _data_init_end + ldr r4, [r0], #4 + ldr r4, [r1], #4 + b __data_init_loop +_data_init_end: + + /* Reset all general purpose registers */ + mov r0, #0 + mov r1, #0 + mov r2, #0 + mov r3, #0 + mov r4, #0 + mov r5, #0 + mov r6, #0 + mov r7, #0 + mov r8, #0 + mov r9, #0 + mov r10, #0 + mov r11, #0 + mov r12, #0 + bl main + +_hang: + b . |