From da7540386e25ced12375cd2bf866363b132178a4 Mon Sep 17 00:00:00 2001 From: Victor Mignot Date: Wed, 23 Jul 2025 10:33:39 +0200 Subject: nrf52832: add peripherals addresses and IRQs --- src/peripherals.h | 208 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+) create mode 100644 src/peripherals.h (limited to 'src') diff --git a/src/peripherals.h b/src/peripherals.h new file mode 100644 index 0000000..214d84e --- /dev/null +++ b/src/peripherals.h @@ -0,0 +1,208 @@ +#ifndef PERIPHERALS_H +#define PERIPHERALS_H + +#include "types.h" + +#define WRITE_REGISTER(spidev, reg, value) \ + (*(volatile u32 *)(memory_map[spidev] + reg) = value) + +#define NO_IRQ 255 + +/** + * All nrf52832's memory-mapped peripherals + */ +enum peripherals { + /* Clock/Power control and Block Protect */ + CLOCK, + + /* 2.4GHz radio */ + RADIO, + + /* UART with EasyDMA */ + UARTE, + + /* SPI master/slave */ + SPI0, + SPI1, + SPI2, + + /* NFC tag */ + NFCT, + + /* GPIO */ + P0, + + /* GPIO Task and Events */ + GPIOTE, + + /* Analog to digital converter */ + SAADC, + + /* Timers */ + TIMER0, + TIMER1, + TIMER2, + TIMER3, + TIMER4, + + /* Realtime clocks */ + RTC0, + RTC1, + RTC2, + + /* Temperature sensor */ + TEMP, + + /* Random number generator */ + RNG, + + /* AES ECB Mode Encryption */ + ECB, + + /* AES CCM Mode Encryption and Accelerated Address Resolver */ + CCM, + + /* Watchdog Timer */ + WDT, + + /* Quadrature Decoder */ + QDEC, + + /* Low Power and General Purpose Comparator */ + COMP, + + /* Software interrupts */ + SWI0, + SWI1, + SWI2, + SWI3, + SWI4, + SWI5, + + /* Pulse Width Modulation Unit */ + PWM0, + PWM1, + PWM2, + + /* Pulse Density Modulation Interface */ + PDM, + + /* Non-volatile Memory Controller */ + NVMC, + + /* PPI controller */ + PPI, + + /* Memory Watch Unit */ + MWU, + + /* Interc-IC Sound Interface */ + I2S, + + /* FPU interrupt */ + FPU, + + /* Factory Information Configuration */ + FICR, + + /* User Information Configurations */ + UICR, +}; + +/** + * nrf52832 peripherals address + */ +static const hwaddr memory_map[] = { + [CLOCK] = 0x40000000, + [RADIO] = 0x40001000, + [UARTE] = 0x40002000, + [SPI0] = 0x40003000, + [SPI1] = 0x40004000, + [SPI2] = 0x40023000, + [NFCT] = 0x40005000, + [GPIOTE] = 0x40006000, + [SAADC] = 0x40007000, + [TIMER0] = 0x40008000, + [TIMER1] = 0x40009000, + [TIMER2] = 0x4000a000, + [TIMER3] = 0x4001a000, + [TIMER4] = 0x4001b000, + [RTC0] = 0x4000b000, + [RTC1] = 0x40011000, + [RTC2] = 0x40024000, + [TEMP] = 0x4000c000, + [RNG] = 0x4000d000, + [ECB] = 0x4000e000, + [CCM] = 0x4000f000, + [WDT] = 0x40010000, + [QDEC] = 0x40012000, + [COMP] = 0x40013000, + [SWI0] = 0x40014000, + [SWI1] = 0x40015000, + [SWI2] = 0x40016000, + [SWI3] = 0x40017000, + [SWI4] = 0x40018000, + [SWI5] = 0x40019000, + [PWM0] = 0x4001c000, + [PWM1] = 0x40021000, + [PWM2] = 0x40022000, + [PDM] = 0x4001d000, + [NVMC] = 0x4001e000, + [PPI] = 0x4001f000, + [MWU] = 0x40020000, + [I2S] = 0x40025000, + [FPU] = 0x40026000, + [FICR] = 0x10000000, + [UICR] = 0x10001000, + [P0] = 0x50000000, +}; + +/** + * nrf52832 peripherals interrupts + */ +static const u8 irqs[] = { + [CLOCK] = 0, + [RADIO] = 1, + [UARTE] = 2, + [SPI0] = 3, + [SPI1] = 4, + [SPI2] = 35, + [NFCT] = 5, + [GPIOTE] = 6, + [SAADC] = 7, + [TIMER0] = 8, + [TIMER1] = 9, + [TIMER2] = 10, + [TIMER3] = 26, + [TIMER4] = 27, + [RTC0] = 11, + [RTC1] = 17, + [RTC2] = 36, + [TEMP] = 12, + [RNG] = 13, + [ECB] = 14, + [CCM] = 15, + [WDT] = 16, + [QDEC] = 18, + [COMP] = 19, + [SWI0] = 20, + [SWI1] = 21, + [SWI2] = 22, + [SWI3] = 23, + [SWI4] = 24, + [SWI5] = 25, + [PWM0] = 28, + [PWM1] = 33, + [PWM2] = 34, + [PDM] = 29, + [NVMC] = 30, + [PPI] = 31, + [MWU] = 32, + [I2S] = 37, + [FPU] = NO_IRQ, + [FICR] = NO_IRQ, + [UICR] = NO_IRQ, + [P0] = NO_IRQ, +}; + +#endif -- cgit v1.2.3